I am a 3rd year Ph.D. student in FPGA/Parallel Computing Lab at University of Southern California, advised by Prof. Prasanna. I’m interested in Graph Neural Networks, Hardware Accelerators/HPC, and Heterogeneous Computing. I have published several papers in HPC-, ASIC-, and FPGA-related conferences in the past two years. Please refer to the publication page for more details.
I finished my undergraduate study in National Taiwan University (NTU), majored in Electrical Engineering. I was also an Electrical Engineering Intern at Hewlett-Packard (HP), Taipei. During my one-year internship, I was fortunate enough to patent my work as first author.
Dec 18, 2022: Our work HyScale-GNN has been accepted to IPDPS 2023 during the first round decesion (~10% acceptance rate)!
Sep 14, 2022: Our work on GNN training acceleration on CPU+Multi-FPGA platform has been accepted to CARLA 2022.
Nov 23, 2021: Our work HP-GNN has been accepted to ACM FPGA 2022.